Electronic calculator systems of the type wherein all of the main electronic functions are integrated in a single large cell integrated semiconductor chip or in a small number of such chips, are described in the following U.S. Patents, which are assigned the assignee of this invention:
U.s.pat. No. 3,919,532 issued to Michael J. Cochran and Charles P. Grant on Nov. 11, 1975 and entitled "CALCULATOR SYSTEM HAVING AN EXCHANGE DATA MEMORY REGISTER". PA1 U.s. pat. No. 3,934,233 issued to Roger J. Fisher and Gerald D. Rogers on Jan. 20, 1976 and entitled "READ-ONLY-MEMORY FOR ELECTRONIC CALCULATOR". PA1 U.s. pat. No. 3,931,507 issued Jan. 6, 1976 to George L. Brantingham entitled "POWER-UP CLEAR IN AN ELECTRONIC DIGITAL CALCULATOR".
The concepts of these prior applications have made possibly vast reductions in the cost of small personal-size calculators. Continuing efforts to reduce the cost of these products include the design of a single chip calculator system for use in large capacity calculators, such as scientific or business calculators. The chip disclosed herein may be utilized in scientific or business calculators for instance because this chip has provisions for a number of storage registers, in addition to operational registers, as well as sufficient capacity to solve the more complicated mathematical expressions and functions used in scientific and business calculators including, for example, trigonometric and logarithmic relationships.
The present invention relates a dual speed shift register system for microprocessor or more specifically for an electronic calculator. The dual speed shift register is provided in an electronic calculator having an arithmetic unit and a memory register, the dual speed shift register controlling transfer of data stored in the memory register to an input of the arithmetic unit. An entire calculator system including the dual speed shift register system of this invention is disclosed. The electronic calculator disclosed is a serial, word organized calculator; however, the invention disclosed is not limited to such a calculator. Calculators known in the prior art have utlized arithmetic units and memory registers having, for instance, one digit of storage capacity and which are arranged to provide the single stored digit as an input to the arithmetic unit.
It is one object of this invention to provide a system in the microprocessor or calculator for selectively providing different numbers of digits of data stored in a multi-digit memory register to a input of the arithmetic unit of the microprocessor or calculator system. More specifically, it was an object of this invention to provide a dual speed shift register responsive to control signals generated by a calculator or microprocessor for selectively inserting one or two digits of data stored in a memory register into an input of the arithmetic unit implemented in the microprocessor or calculator. It is still yet another object of this invention to provide a dual speed shift register of simplified design.
The foregoing objects are achieved according to the present invention as is now described. In a preferred embodiment of the invention, a dual speed shift register is provided on an electronic calculator semiconductor chip, the calculator also being provided with arithmetic unit and an auxiliary memory register. The auxiliary memory register is provided with sufficient stages to store two digits of numeric data. The dual speed shift register is responsive to a plurality of control signals provided by the calculator system for transferring one or two of the digits stored in the auxiliary memory register to an input of the arithmetic unit. The two speed shift register is preferably responsive to a four phase clock on the semicionductor chip. A two speed shift register comprises a plurality of inverter stages each interconnected by a gate. The plurality of gates interconnecting the inverter stages are separately clocked either on a first phase of the clock, on second and fourth phases of the clock or selectively on first and third phases of the clock. The auxiliary memory register is preferably loadable with two digits of data either from the output of the arithmetic unit or data generated by operation of the calculator's keyboard.